PhD and Student Forum
Download the complete pdf version of the call for PhD and Student Forum contributions
Guidelines
VLSI-SoC 2025 is the 33rd in a series of international conferences sponsored by IFIP TC 10 WG 10.5, IEEE CASS, IEEE CEDA and ACM SIGDA, which explores the state-ofthe-art in the areas that surround Very Large Scale Integration (VLSI) and System-onChip (SoC). The 2025 edition will take place at Puerto Varas, a tourist and top destination in South Chile, to who likes the beautiful of nature. It is a scenic location close to mountains, lakes, forests and national parks.
Topics of interest include but are not limited to:
- Analog and Mixed-Signal IC Design
- 3-D Integration
- Physical Design
- Electronic Design Automation
- Variability, Reliability, Fault Tolerance and Test
- Digital Signal Processing and Image Processing SoC Design
- Prototyping, Validation, Verification, Modelling, and Simulation
- Embedded Systems and Processors, Hardware/Software Codesign
- Processor Architectures and Multicore SOCs
- Logic and High-Level Synthesis
- Low-Power and Thermal-aware Design
- Reconfigurable SoC Systems for Energy and Reliability
- Green Computing Systems
- Circuits and Systems for Micro-sensing Applications
Eligibility for Ph.D. Forum: The author must have completed at least one year of a Ph.D. program. Past Ph.D. scholars who have defended their thesis in or after June 2024 are also encouraged to submit.
Eligibility for the Student Forum: Undergraduate and Master Students.
Presentation: Posters will be introduced in the Ph.D. Forum Session (two- minute time slot, one slide) and next will be presented in a full one-hour Poster Session.
Publication: Accepted posters will be given two pages in the IEEE XPlore proceedings.
Grants for students: VLSI-SoC 2025 will provide a limited number of travel grants through the Technical Committee TC-10 (Computer Systems Technology) and WG-10.5 of the International Federation for Information Processing ─ IFIP. Grants are intended to support students from emerging and underdeveloped countries (by UN classification), who cannot be fully supported by their institutions.Students can also apply for travel grants from IEEE CASS and IEEE CEDA.
How to Apply: Submit a two-page, two columns extended abstract of your research work in PDF format. Send submissions via EASYCHAIR platform of VLSI-SoC 2025.
Paper Format: Papers should be compliant with the guidelines for regular papers.