LADIB Bootcamp Program

Monday - July 7, 2025

Digital Integrated Circuit Design

Time	Topic	Lecturer
8:30 – 9:00	Event Registration
9:00 – 10:50	Introduction to Digital Design Flow	Victor Grimblatt
10:50 – 12:40	Verilog for Synthesis	Victor Grimblatt
12:40 – 13:40	Lunch Break
13:40 – 15:30	Fundamentals of CMOS I	Victor Grimblatt
15:30 – 17:20	Simulation of Digital Circuits with VCS	Victor Grimblatt
17:30 – 18:30	Keynote	(TBD)

Tuesday - July 8, 2025

Time	Topic	Lecturer
9:00 – 10:50	Fundamentals of CMOS II	Victor Grimblatt
10:50 – 12:40	Lab 1: Verilog	Victor Grimblatt
12:40 – 13:40	Lunch break
13:40 – 15:30	Introduction to Fabrication of ICs	Victor Grimblatt
15:30 – 17:20	Lab 2: Verilog	Victor Grimblatt
17:30 – 18:30	Keynote	(TBD)

Wednesday - July 9, 2025

Time	Topic	Lecturer
9:00 – 10:50	Design Compiler I	Ariana Musello
10:50 – 12:40	Design Compiler II	Ariana Musello
12:40 – 13:40	Lunch break
13:40 – 15:30	Lab 3: Synthesis with Design Compiler	Ariana Musello
15:30 – 17:20	Lab 4: Synthesis with Design Compiler	Ariana Musello
17:30 – 18:30	Keynote	(TBD)

Thursday - July 10, 2025

Time	Topic	Lecturer
9:00 – 10:50	IC Compiler I	José Martínez
10:50 – 12:40	IC Compiler II	José Martínez
12:40 – 13:40	Lunch break
13:40 – 15:30	Lab 5: Place & Route with IC Compiler	José Martínez
15:30 – 17:20	Lab 6: Place & Route with IC Compiler	José Martínez
17:30 – 18:30	Keynote	(TBD)

Friday - July 11, 2025

Time	Topic	Lecturer
9:00 – 10:45	Lab 7: Final Review	(TBD)
10:45 – 12:30	Evaluation
12:30 – 13:30	Lunch break
13:30 – 15:15	(Further activities/discussion - TBD)
15:15 – 17:00	Event Closure & Wrap-up