Program

Program
Date Time Topic Lecturer
Monday 2/1 9:00 - 9:30 Welcome Victor Grimblatt
Ronald Valenzuela
Esteban Viveros
9:00 - 10:30 Introduction to Digital Design Flow Victor Grimblatt
10:30 - 12:00 Verilog for synthesis Victor Grimblatt
Tuesday 2/2 9:30 - 10:30 Industry 4.0 and its Impact on Health Pablo Aqueveqe
10:30 - 12:30 Lab 1 Verilog Victor Grimblatt
Wednesday 2/3 9:00 - 10:30 Simulation of digital circuits Victor Grimblatt
10:30 - 12:00 VCS Victor Grimblatt
Thursday 2/4 9:30 - 10:30 Technology and Health - A Good Match Jose Tomas Arenas
10:30 - 12:00 Lab 2 Verilog Victor Grimblatt
Friday 2/5 9:00 - 10:30 Design compiler (1) Esteban Viveros
10:30 - 12:00 Design compiler (2) Esteban Viveros
Monday 2/8 9:30 - 10:30 Memristor-based in-Memory Logic Design Methodologies Ioannis Vourkas
10:30 - 12:30 Lab DC Esteban Viveros
Tuesday 2/9 9:00 - 10:30 IC Compiler II (1) Ronald Valenzuela
10:30 - 12:00 IC Compiler II (2) Ronald Valenzuela
Wednesday 2/10 9:30 - 10:30 Improved IoT capabilities for Agriculture applications Guillaume Ferré
10:30 - 12:30 Lab ICC II Ronald Valenzuela
Thursday 2/11 9:00 - 10:30 Streamlined Implementation (1) Ronald Valenzuela
10:30 - 12:00 Streamlined Implementation (2) Ronald Valenzuela
Friday 2/12 9:30 - 10:30 IEEE - CAS Victor Grimblatt
10:30 - 12:30 Lab Streamlined Implementation Ronald Valenzuela
12:30 - 13:00 Closure Victor Grimblatt
Ronald Valenzuela
Esteban Viveros

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