{"id":493,"date":"2022-11-04T19:29:58","date_gmt":"2022-11-04T19:29:58","guid":{"rendered":"https:\/\/asic-chile.cl\/icbootcampbb\/?page_id=493"},"modified":"2026-01-16T20:26:33","modified_gmt":"2026-01-16T20:26:33","slug":"lecturers","status":"publish","type":"page","link":"https:\/\/asic-chile.cl\/sm\/lecturers\/","title":{"rendered":"Lecturers"},"content":{"rendered":"\t\t
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Lecturers<\/h1>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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January 19th \u2013 23rd, 2026 | 9:00 AM \u2013 6:00 PM daily<\/h5>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Salas PC01 y PC02, edificio P, Universidad T\u00e9cnica Federico Santa Mar\u00eda<\/strong>
\nLos Placeres 466, Valpara\u00edso\n<\/h5>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Victor Grimblatt<\/h3><\/div><\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Victor Grimblatt has an engineering diploma in microelectronics from Institut Nationale Polytechnique de Grenoble (INPG \u2013 France) and an electronic engineering diploma from Universidad Tecnica Federico Santa Maria (Chile). He is doing his PhD on IoT for Smart Agriculture at IMS lab, University of Bordeaux. He is currently R&D Group Director and General Manager of Synopsys Chile. He has expertise and knowledge in business and technology and understands very well the trends of the electronic industry; therefore, he is often consulted for new technological business development. He has published several papers in IoT, EDA and embedded systems development, and since 2007 he has been invited to several Latin American Conferences (Argentina, Brazil, Chile, Mexico, Peru and Uruguay) to talk about Circuit Design, EDA, IoT, and Embedded Systems. Since 2012 he is chair of the IEEE Chilean chapter of the CASS. He is also the President of the Chilean Electronic and Electrical Industry Association (AIE). He has been part of several conferences TCP (ISCAS, ICECS, LASCAS) and is chairing the EDA and Circuit design Sub-Committee for ICECS. He is also Program Co-Chair of FoodCAS. Since 2018 he is Chair of LASCAS Steering Committee.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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Juan Orellana<\/h3><\/div><\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Juan Orellana is an Automation Engineer graduated from Universidad del Bio-Bio in Concepcion Chile,\u00a0 with experience in synthesis, place-and-route testing.\u00a0 He joined Synopsys in 2018 as Product Validation member, currently is a technical leader of the team, providing costumer support running weekly regressions in Fusion Compiler tool.<\/span><\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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Ronaldo Serrano<\/h3><\/div><\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Ronaldo Serrano received the B.Sc. degree in electronics from the Universidad Industrial de Santander (UIS) (Bucaramanga, Colombia) in 2020. Besides, a Ph.D. degree in electronics from the University of Electro-Communications (UEC) (Tokyo, Japan) in 2023. He was a Research Assistant in a collaboration between UEC, and the National Institute of Advanced Industrial Science and Technology (AIST) focused on hardware for security in Trusted Execution Environments (TEE) based on RISC-V processors from 2020 to 2022. Since 2022, he has been working at Synopsys, providing support and validation in the RTL to GDS process using the fusion compiler tool. He has published several papers related to hardware for security and low-power System on a Chip (SoC). In addition, he serves as an active reviewer in multiple journals like IEEE Access, IEEE Transactions on Circuits and Systems I\/II and IEEE Transactions on Very Large-Scale Integration (VLSI) systems.<\/div>
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Lecturers January 19th \u2013 23rd, 2026 | 9:00 AM \u2013 6:00 PM daily Salas PC01 y PC02, edificio P, Universidad T\u00e9cnica Federico Santa Mar\u00eda Los Placeres 466, Valpara\u00edso Victor Grimblatt Victor Grimblatt has an engineering diploma in microelectronics from Institut Nationale Polytechnique de Grenoble (INPG \u2013 France) and an electronic engineering diploma from Universidad Tecnica […]<\/p>\n","protected":false},"author":2,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"elementor_header_footer","meta":{"_acf_changed":false,"footnotes":""},"class_list":["post-493","page","type-page","status-publish","hentry"],"acf":[],"yoast_head":"\nLecturers - courses<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/asic-chile.cl\/sm\/lecturers\/\" \/>\n<meta property=\"og:locale\" content=\"es_ES\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Lecturers - 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