{"id":493,"date":"2022-11-04T19:29:58","date_gmt":"2022-11-04T19:29:58","guid":{"rendered":"https:\/\/asic-chile.cl\/icbootcampbb\/?page_id=493"},"modified":"2025-12-16T15:03:24","modified_gmt":"2025-12-16T15:03:24","slug":"lecturers","status":"publish","type":"page","link":"https:\/\/asic-chile.cl\/ictecdebolivar\/lecturers\/","title":{"rendered":"Lecturers"},"content":{"rendered":"\t\t
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Lecturers<\/h1>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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July 14 th - July 18 th , 2025<\/h5>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Universidad Tecnol\u00f3gica de Bol\u00edvar<\/strong>
Campus Tecnol\u00f3gico, Km 1, Via Turbaco, Cartagena, Colombia.
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Joan Santamar\u00eda<\/h3><\/div><\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Joan Santamar\u00eda is an Electronic Engineer graduated from Universidad Industrial de Santander (UIS) in Colombia. He has academic experience in Analog IC design and testing. He joined Synopsys in 2022 as an Applications Engineer, providing customer support for the company’s functional verification tools VCS and Verdi.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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Esteban Viveros<\/h3><\/div><\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Esteban Viveros is an Electronic Engineer from Universidad de Concepci\u00f3n (Concepcion, Chile).<\/p>

He started to work at Synopsys on December 2013 as Quality Engineer and now he is R&D Manager of a team in Chile Site.<\/p>

The PV team is part of the Digital Design Group (DDG) and works on the \u201cProduct Validation\u201d of the Synopsys tools used for RTL Synthesis, Test, Physical Implementation (Place and Route), Formal Verification and Sign-off. His team is responsible of the quality of the tools focusing on the stability, performance, usability and QoR (Quality of Results). The team interacts daily with colleagues and internal\/external customers in different parts of the world (mainly US, China and Taiwan).<\/p>

Besides that, Esteban actively collaborates on the university training activities dictated by Synopsys Chile.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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Ronald Valenzuela<\/h3><\/div><\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Ronald Valenzuela currently manages a team of Product Engineers (PE) at Synopsys. With his team, they provide support on Power Optimization and Power Analysis\u202fcapabilities of Synthesis and Place & Route tools. As PEs, they engage with customers to enable methodologies and, also contribute to planning and testing of the tools. Ronald has 10 years of experience in EDA Industry, he is Electronics Engineer of Universidad de Concepci\u00f3n and has a certification on Integrated Circuit design from Stanford University, CA<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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Lecturers July 14 th – July 18 th , 2025 Universidad Tecnol\u00f3gica de Bol\u00edvar Campus Tecnol\u00f3gico, Km 1, Via Turbaco, Cartagena, Colombia. Joan Santamar\u00eda Joan Santamar\u00eda is an Electronic Engineer graduated from Universidad Industrial de Santander (UIS) in Colombia. He has academic experience in Analog IC design and testing. He joined Synopsys in 2022 as […]<\/p>\n","protected":false},"author":2,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"elementor_header_footer","meta":{"_acf_changed":false,"footnotes":""},"class_list":["post-493","page","type-page","status-publish","hentry"],"acf":[],"yoast_head":"\nLecturers - Synopsys Bootcamp<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/asic-chile.cl\/ictecdebolivar\/lecturers\/\" \/>\n<meta property=\"og:locale\" content=\"es_ES\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Lecturers - Synopsys Bootcamp\" \/>\n<meta property=\"og:description\" content=\"Lecturers July 14 th – July 18 th , 2025 Universidad Tecnol\u00f3gica de Bol\u00edvar Campus Tecnol\u00f3gico, Km 1, Via Turbaco, Cartagena, Colombia. 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