Lecturers
January 9th – January 13th, 2023
Every day from 9 am to 7 pm
Universidad Santa María, Valparaíso
Ronald Valenzuela
Ronald Valenzuela currently manages a team of Product Engineers (PE) at Synopsys. With his team, they provide support on Power Optimization and Power Analysis capabilities of Synthesis and Place & Route tools. As PEs, they engage with customers to enable methodologies and, also contribute to planning and testing of the tools. Ronald has 10 years of experience in EDA Industry, he is Electronics Engineer of Universidad de Concepción and has a certification on Integrated Circuit design from Stanford University, CA
Esteban Viveros
Esteban Viveros is an Electronic Engineer from Universidad de Concepción (Concepcion, Chile). He started to work at Synopsys on December 2013 as Quality Engineer and now he is R&D Manager of a team in Chile Site. The PV team is part of the Digital Design Group (DDG) and works on the "Product Validation" of the Synopsys tools used for RTL Synthesis, Test, Physical Implementation (Place and Route), Formal Verification and Sign-off. His team is responsible of the quality of the tools focusing on the stability, performance, usability and QoR (Quality of Results). The team interacts daily with colleagues and internal/external customers in different parts of the world (mainly US, China and Taiwan). Besides that, Esteban actively collaborates on the university training activities dictated by Synopsys Chile.
Víctor Grimblatt
Victor Grimblatt has an engineering diploma in microelectronics from Institut Nationale Polytechnique de Grenoble (INPG – France) and an electronic engineering diploma from Universidad Tecnica Federico Santa Maria (Chile). He is doing his PhD on IoT for Smart Agriculture at IMS lab, University of Bordeaux. He is currently R&D Group Director and General Manager of Synopsys Chile. He has expertise and knowledge in business and technology and understands very well the trends of the electronic industry; therefore, he is often consulted for new technological business development. He has published several papers in IoT, EDA and embedded systems development, and since 2007 he has been invited to several Latin American Conferences (Argentina, Brazil, Chile, Mexico, Peru and Uruguay) to talk about Circuit Design, EDA, IoT, and Embedded Systems. Since 2012 he is chair of the IEEE Chilean chapter of the CASS. He is also the President of the Chilean Electronic and Electrical Industry Association (AIE). He has been part of several conferences TCP (ISCAS, ICECS, LASCAS) and is chairing the EDA and Circuit design Sub-Committee for ICECS. He is also Program Co-Chair of FoodCAS. Since 2018 he is Chair of LASCAS Steering Committee.
Víctor Grimblatt
Victor Grimblatt has an engineering diploma in microelectronics from Institut Nationale Polytechnique de Grenoble (INPG – France) and an electronic engineering diploma from Universidad Tecnica Federico Santa Maria (Chile). He is doing his PhD on IoT for Smart Agriculture at IMS lab, University of Bordeaux. He is currently R&D Group Director and General Manager of Synopsys Chile. He has expertise and knowledge in business and technology and understands very well the trends of the electronic industry; therefore, he is often consulted for new technological business development. He has published several papers in IoT, EDA and embedded systems development, and since 2007 he has been invited to several Latin American Conferences (Argentina, Brazil, Chile, Mexico, Peru and Uruguay) to talk about Circuit Design, EDA, IoT, and Embedded Systems. Since 2012 he is chair of the IEEE Chilean chapter of the CASS. He is also the President of the Chilean Electronic and Electrical Industry Association (AIE). He has been part of several conferences TCP (ISCAS, ICECS, LASCAS) and is chairing the EDA and Circuit design Sub-Committee for ICECS. He is also Program Co-Chair of FoodCAS. Since 2018 he is Chair of LASCAS Steering Committee.
Ronald Valenzuela
Ronald Valenzuela currently manages a team of Product Engineers (PE) at Synopsys. With his team, they provide support on Power Optimization and Power Analysis capabilities of Synthesis and Place & Route tools. As PEs, they engage with customers to enable methodologies and, also contribute to planning and testing of the tools. Ronald has 10 years of experience in EDA Industry, he is Electronics Engineer of Universidad de Concepción and has a certification on Integrated Circuit design from Stanford University, CA
Esteban Viveros
Esteban Viveros is an Electronic Engineer from Universidad de Concepción (Concepcion, Chile).
He started to work at Synopsys on December 2013 as Quality Engineer and now he is R&D Manager of a team in Chile Site.
The PV team is part of the Digital Design Group (DDG) and works on the “Product Validation” of the Synopsys tools used for RTL Synthesis, Test, Physical Implementation (Place and Route), Formal Verification and Sign-off.
His team is responsible of the quality of the tools focusing on the stability, performance, usability and QoR (Quality of Results).
The team interacts daily with colleagues and internal/external customers in different parts of the world (mainly US, China and Taiwan).
Besides that, Esteban actively collaborates on the university training activities dictated by Synopsys Chile.
Krzysztof Herman
Two years, four tape-outs - how to get your first experience in microelectronics
The presentation reveals the experiences and some results of two Open Source projects developed under the IEEE SSCS contests: SSCS Pico Program 2021 and Chipaton 2022. We have developed two separate solutions: two versions of a digital sonar processing unit called “Sonar on Chip” and a mixed signal circuit for smart imaging named “Mix-Pix”. During the development of the Mix-Pix project, we have also submitted some test fixtures of photodiodes with and without read out circuits together with University of Michigan as part of SKY130 MPW-7 shuttle. The talk will cover not only the technical aspects of the abovementioned solutions but also issues related with the open source tools, community growth and support, future shuttles like GF 180 and SKY90 FDSOI and the potential related to Open Source silicon development.
MSc in acoustics 2007, DSc in telecommunications 2013, graduated from Wroclaw University of Science and Technology, Poland.
Scientific interests: array (sonar) signal processing, embedded system development, IoT applications for hostile environments, mainly for polar and subpolar research. Member of Arctic and Antarctic scientific expeditions. Since 2015 full-time researcher and academic teacher at the Department of Electrical and Electronics Engineering, University of the Bio-Bio, Concepción, Chile.
Francois Rivet
Circuits to make my smartphone really smart!
1G, 2G, 3G, 4G: each generation of wireless communications brings its breakthroughs not only in engineering the network or the cellphones but also in the application they can provide. 5G has arrived in our everyday lives. The main access to the spectrum will be the sub-6GHz one. RF designers are facing a more and more challenging paradigm between being wide-band, low-power and low-cost at the same time. This talk introduces the challenges faced by RadioFrequency Integrated Circuits (RFIC) designers. We will present several examples of disruptive systems to prepare the next generations of telecommunications, beyond 5G, 6G and even beyond 6G!
Dr. Francois Rivet received the Master and the PhD degree respectively in 2005 and 2009 from the University of Bordeaux. Since June 2010, he has been an Associate Professor at Bordeaux Institute of Technology (Bordeaux INP). His research is focused on the design of RFICs in the IMS Laboratory, the microelectronics laboratory of the University of Bordeaux. In 2014, he founded the “Circuits and Systems” research team with 3 faculties, 2 engineers, 9 PhD students and 4 Master students. Dr. Rivet has 100+ publications in top ranked journals, international conferences, national conferences and holds 17 patents. He is a member of several Technical Program Committees (RFIC, ESSCIRC, …) and steering committees (RFIC, ICECS, LASCAS).
Alfredo Arnaud & Joel Gak
Experiences in ASIC design for implantable medical and other niche applications.
Some niche applications such as implantable medical devices greatly benefit from microelectronic technology, but the development of ASICs is limited by the low production volume. In this presentation we will review some experiences from Chipmate, and ABM, of custom CMOS chips for the industry such as a pacemaker chip, or integrated circuit blocks for FES or galvanic isolation. All these applications have in common that they are power-constrained analog and mixed-mode circuits, developed in specific CMOS-HV technologies, and the projects were developed by a team of 2 to 4 designers.
Alfredo Arnaud (Ph.D, 2004, M.Sc, 2000, Eng., 1997) has participated in several R&D projects for the industry and in the university (http://die.ucu.edu.uy/microdie) in the field of microelectronics. His area of expertise is micro-power and high-performance analog circuits for medical electronics, RFID, IoT, among others. He is the co-founder of three technology companies: BQN (http://www.bqn.com.uy), ABM (https://www.abmsolutions.com.uy/), and Chipmate, and has been a project leader in the development of 7 active electronic products in the market, and worked for companies in Uruguay, Brazil, the United States, Canada, Belgium, and India. Dr. Arnaud is an IEEE Senior Member, and SNI-NIII researcher in Uruguay (https://sni.org.uy/). He is an ICT4V board member (https://ict4v.org/) and in the Uruguayan ICT Chamber (https://cuti.org.uy/mesas-de-trabajo/electronica-robotica/).
Joel Gak (M’07), received his Ph.D. degree in 2017 from Universidad Nacional del Sur, Bahia Blanca, Argentina, he received MSc and Graduate degree in Electronics Engineering from the Universidad Católica in 2007 and 2010 respectively. In 2005, he joined the Engineer Department, Universidad Católica, Montevideo, Uruguay. Since 2005, he has been involved in research projects in the field of CMOS analog and mixed mode design and high voltage technology manly applied to implantable medica devices (http://die.ucu.edu.uy/microdie), UHV technologies for chip on the outlet applications and IoT among others. Cofounder of Chipmate medical solution on silicon, which has developed several commercial chips.
Ioannis Vourkas
The Rise of ReRAM Technology: Opportunities & Challenges
Technology of resistive switching devices (ReRAM devices or just “memristors”) is continuously maturing and has already attracted a wide interest from the industrial sector. Several companies around the world are putting efforts towards ReRAM nanofabrication and commercialization of innovative products exploiting such emerging technology. Promising applications range from nonvolatile resistive memories to neuromorphic and memory-centric computing. Nevertheless, initiation of students in practical experiments with resistive switching electronic devices is still lacking enough attention from academia. Comprehension of memristor fundamental behavior through simulation-based learning, is the key substrate before further experimentation can take place. In this context, this talk will present the basic operations of memristors as resistive memory cells, and their functional imperfections owing to variability. It will comment on the opportunities given by such technology, but also it will highlight the pending issues and challenges for the uninitiated engineers. Commercially available memristor devices and circuit topologies that facilitate laboratory experiments will be shown, to motivate researchers and students to dare implement and test memristor application ideas in hardware.
Dr. Ioannis Vourkas was born in Kozani, Greece, in 1985. He received the M. Eng. (Diploma) and the Ph.D. degrees in Electrical and Computer Eng. (ECE) from the Democritus University of Thrace (DUTh), Greece, in 2008 and 2014, respectively. In 2015 he became a postdoctoral researcher at the Pontifical Catholic University of Chile (PUC). Currently he is Associate Professor with Tenure in the Dept. of Electronic Eng. of Universidad Técnica Federico Santa María (UTFSM) in Valparaíso, Chile. Ever since 2018, he also holds an associate researcher appointment with the AC3E Research Center of UTFSM. His current research focuses on ReRAM characterization, modeling, and simulation, and on novel circuits and architectures for ReRAM-centric computing. His research interests include unconventional and in-memory computing, as well as software and hardware aspects of parallel bio-inspired computational circuits and systems. He is the main author of one book, three book chapters, of more than 25 international journal articles and more than 40 papers included in peer-reviewed conference proceedings. He is IEEE CASS and NanoGiga TC member and serves in the Editorial Board of IEEE Trans. on Nanotechnology (since 2021) and Elsevier Microelectronics Journal (since 2017). He has been a scholar of the Greek BODOSSAKI Foundation (2011 to 2014) and of the Santander Universities Program (2018/2019).
Jorge Marín
Analog/Power Integrated Circuit Design Initiatives at AC3E-UTFSM
Analog integrated circuit design is a relevant field in the IoT era in which compact, energy-efficient and autonomous devices are ubiquitously present. Nevertheless, it has not been broadly covered at university-level curriculum in Chilean universities. We will show some design experiences within the AC3E-UTFSM research institute, mostly focused on student education, which have led to the first integrated power converter chip demonstrator sent for fabrication at our research center. We will also highlight the current and future research and educational activities related to analog IC design at AC3E-UTFSM.
Jorge Marin received the M.Sc. degree in electrical engineering from the Katholieke Universiteit Leuven (KULeuven), Leuven, Belgium, in 2012. In 2012, he joined MICAS-ESAT Group, KU Leuven, as a Ph.D. researcher, under the supervision of Prof. G. Gielen, where he worked in digitally-assisted analog circuits for sensor interfaces. He is currently working as a postdoctoral researcher at the Advanced Center for Electrical and Electronic Engineering (AC3E) in Valparaíso, Chile. His research interests include analog, mixed signal and power integrated circuit design and automation.
Oscar Rojas, Jose Cayo and Benjamin Pannatt
IC Design in AC3E-Synopsys Internship Program: student hands-on experience
Currently, many countries are investing in training of HHRR in microelectronics and IC design. Unfortunately, very few people in Chile work in this area, there are very few relative University courses, thus the country is so far not attractive to major companies and research institutions designing ICs. Nevertheless, Chile can surely provide a sustained increase in the number of available professionals with experience in this field and supply the highly specialized HHRR that this industry requires. Those who will become tomorrow’s IC designers and researchers are today´s students, eager to learn about IC design and fabrication. To this end, research centers and companies in the sector can have a major impact, creating opportunities for students to learn from real design processes and to use state-of-the-art software tools for IC design and verification. The presentation will summarize the first year of this internship program, from a students’ perspective: the training process with professional design software and the first IC design project. Special emphasis will be placed on the difficulties encountered and the challenges exposed through the workflow. Future work, opportunities for student participation and growth of microelectronics in Chile will also be discussed.
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Ronald Valenzuela
