{"id":493,"date":"2022-11-04T19:29:58","date_gmt":"2022-11-04T19:29:58","guid":{"rendered":"https:\/\/asic-chile.cl\/icbootcampbb\/?page_id=493"},"modified":"2025-12-16T14:33:54","modified_gmt":"2025-12-16T14:33:54","slug":"lecturers","status":"publish","type":"page","link":"https:\/\/asic-chile.cl\/icbootcampipn\/lecturers\/","title":{"rendered":"Lecturers"},"content":{"rendered":"\t\t
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Lecturers<\/h1>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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August 25 th - August 29 th , 2025<\/h5>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Instituto Polit\u00e9cnico Nacional (IPN)<\/strong>
Centro de Investigaci\u00f3n en Computaci\u00f3n
\nAv. Juan de Dios B\u00e1tiz, esq. Miguel Oth\u00f3n de Mendiz\u00e1bal,\n
\nCol. Nueva Industrial Vallejo, Alcald\u00eda Gustavo A. Madero, C.P. 07738, Ciudad de M\u00e9xico.<\/h5>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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\"\"<\/figure>

Joan Santamar\u00eda<\/h3><\/div><\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Joan Santamar\u00eda is an Electronic Engineer graduated from Universidad Industrial de Santander (UIS) in Colombia. He has academic experience in Analog IC design and testing. He joined Synopsys in 2022 as an Applications Engineer, providing customer support for the company\u00b4s functional verification tools VCS and Verdi.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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\"\"<\/figure>

Benjam\u00edn Villegas<\/h3><\/div><\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Benjam\u00edn Villegas has a Master of Science (MSc.) in Electronic Engineering with a minor in Computers, from the Universidad T\u00e9cnica Federico Santa Mar\u00eda (UTFSM) in Valparaiso, Chile. He currently works as a product engineer (PE) at Synopsys since March 2024, supporting Power Analysis capabilities of Synthesis and Place & Route tools. While pursuing his master\u2019s degree, he worked as a research assistant with a focus on microelectronic design, RISC-V and System on Chip (SoC) technology. He has also performed research in topics related to data science, machine learning (ML) and Internet of Things (IoT).<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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\"\"<\/figure>

Juan Orellana<\/h3><\/div><\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Juan Orellana is an Automation Engineer graduated from Universidad del Bio-Bio in Concepcion Chile,\u00a0 with experience in synthesis, place-and-route testing.\u00a0 He joined Synopsys in 2018 as Product Validation member, currently is a technical leader of the team, providing costumer support running weekly regressions in Fusion Compiler tool.\u00a0<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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Victor Grimblatt has an engineering diploma in microelectronics from Institut Nationale Polytechnique de Grenoble (INPG \u2013 France) and an electronic engineering diploma from Universidad Tecnica Federico Santa Maria (Chile). He is doing his PhD on IoT for Smart Agriculture at IMS lab, University of Bordeaux. He is currently R&D Group Director and General Manager of Synopsys Chile. He has expertise and knowledge in business and technology and understands very well the trends of the electronic industry; therefore, he is often consulted for new technological business development. He has published several papers in IoT, EDA and embedded systems development, and since 2007 he has been invited to several Latin American Conferences (Argentina, Brazil, Chile, Mexico, Peru and Uruguay) to talk about Circuit Design, EDA, IoT, and Embedded Systems. Since 2012 he is chair of the IEEE Chilean chapter of the CASS. He is also the President of the Chilean Electronic and Electrical Industry Association (AIE). He has been part of several conferences TCP (ISCAS, ICECS, LASCAS) and is chairing the EDA and Circuit design Sub-Committee for ICECS. He is also Program Co-Chair of FoodCAS. Since 2018 he is Chair of LASCAS Steering Committee.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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Ariana Musello is an Electronic Engineer with a minor in Computer Science Engineering from Universidad San Francisco de Quito (USFQ), Ecuador. After graduating Summa Cum Laude in 2021 as Valedictorian, she began her career at Synopsys, Chile, as a Test & Validation Engineer in the Design Technology Group. She specializes in automation through creative scripting, infrastructure development to optimize processes, and testing of Synopsys\u2019 EDA tools, with a deep understanding of the integrated circuit design flow. She previously worked as a Research Assistant at USFQ\u2019s Instituto de Micro y Nanoelectr\u00f3nica, focusing on spintronic devices, neural networks and circuit design with novel topologies, publishing five papers and participating in the design of Ecuador\u00b4s first VLSI microchip. She was also Chair of USF\u00b4s 2021 IEEE Student Branch and USFQ\u2019s 2020 Women in Engineering Affinity Group. Ariana has a keen interest in artificial intelligence, computer architecture, and science communication, with a focus on exploring interdisciplinary approaches to the fields of electronics and programming. She is passionate about learning and teaching and, is committed to strengthening the presence of women in STEM.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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