1st Synopsys Chile Digital

Integrated Circuits Design Academy

January 22th – March 28th, 2024

Every week from 9:00 to 18:00 (working days)

Universidad de La Frontera.

Av. Francisco Salazar 01145, Temuco

Organizers:

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Synopsys Chile Digital Integrated Circuits Design Academy Certificate

Empowering the Next Generation of Semiconductor Professionals

As the technological landscape evolves, semiconductors are the backbone behind new, advanced devices, leading to a growing demand for skilled semiconductor engineers. Deloitte predicts the global industry will need to fill over 1 million additional semiconductor jobs by 2030, equivalent to 100,000 jobs annually, making workforce development programs increasingly vital to modernize our society.

Synopsys Chile Innovation Center and Universidad de La Frontera invite you, students in your final year of studies; professionals in electronic, electrical, and computer science engineering; and physics graduates, to participate in the 1st Synopsys Chile Integrated Circuits Design Academy, a 10 week-course where you will attend to classes and workshops enabling access to cutting-edge technologies to learn and strengthen skills around design and simulation of digital integrated circuits that are highly demanded in an increasingly more competitive and technologized market.

Rapid changes in Integrated Circuits (IC) technology and constantly shrinking nodes demand new capabilities and skills to meet the contemporary requirements for IC design.

This course covers the digital IC design flow, from the RTL to the GDSII. All steps of the flow, such as verification, synthesis, place & route, and signoff, will be studied together with practical considered in the corresponding labs. In the last weeks of the academy, students will develop a real project, where they will be able to put into practice the knowledge acquired.

Who should apply?

Students in their final year of studies; professionals in electronic, electrical, and computer science engineering; and physics graduates.

Candidates will be selected based on the background information provided, a knowledge test, and a face-to-face personal interview.

Synopsys Chile Integrated Circuits Design Academy Certificate

At the end of the 10-week course participants will receive a certificate and a diploma that certifies the level of knowledge acquired. Certification is granted by Universidad de La Frontera and Synopsys, Inc.

Synopsys Scholarships

There is no cost to participate once you have been selected. In addition, student will receive a total of CLP 750.000 for their 10-weeks participation in order to cover some of their cost of lodging and cost of food.

Apply now and get certified!

*Synopsys Chile opened in 2006 is one of Synopsys Inc., most important Innovation centers the company has around the world and the only one in Latin America. Here, more than 170 engineers develop an important part of the latest generation software that the largest global companies use in the design of their chips.

**Located in the Region of the Araucanía, Chile, the Universidad de La Frontera (UFRO) is a state, public institution of higher learning, considered among the best universities in the country based on its remarkable indicators of quality and excellence.

More information is coming soon.

Preliminar Program

·       Unix/linux (material sent to students)​

·       TCL and scripting (material sent to students)​

·       ASIC Design Flow (in person class)

·       Basic of CMOS (in person class)​

·       Verilog (material sent. to students and in person class)​

·       Verilog lab

RTL and verification (Simulation, coverage, assertion, SAIF)​       Alejandro Estay

·       System Verilog​  (Alejandro Estay, Wladimir Valenzuela)

·       Lab​     (Alejandro Estay, Wladimir Valenzuela)

·       Synthesis​ (Ariana Musello)

·       Formality​ (Silvia Rincón)

·       DFT​ (Ariana Musello, Silvia Rincón)

·       Lab​ (Silvia Rincón)

·       Low power​ (Lucas Santis)

·       STA pre layout​ (Edward Silva)

·       Lab UPF Fundamentals (Sebastián Santelices, Lucas Santis, Edward Silva)

·       Floorplan​ (Jorge Blanco, Ronaldo Serrano)

·       Placement​ (Jorge Blanco, Ronaldo Serrano)

·       Routing​ (Jorge Blanco, Ronaldo Serrano)

·       Clock tree synthesis​ (Jorge Blanco, Ronaldo Serrano)

·       Lab​ (Jorge Blanco, Ronaldo Serrano)

·       STA post layout​ (Helmut Rodríguez, Oscar Araque)

·       Sign off​ (Helmut Rodríguez, Oscar Araque)

·       Lab​ (Helmut Rodríguez, Oscar Araque)

·       Review of previous week​ (José Martínez, Andrés Centeno)

·       Project development​

·       Project presentation​

·       Final exam​

Lecturers

Registration

PREREQUISITES
Students in their final year of studies; professionals in electronic, electrical, and computer
science engineering; and physics graduates.
Candidates will be selected based on the background information provided, a knowledge test,
and a face-to-face personal interview.

Background information to be attached:

  • Updated resume
  • Personal letter indicating your motivation to participate
  • Academic backgrounds:

Students and graduates: Academic Transcript (Concentración de notas)
Professionals: Diploma or Degree Certificate.

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