Universidad Federico Santa María, IEEE CAS Chile and Synopsys, invites you to the 8th Integrated Circuit Design School. The seminar has lectures and exercise classes where you will be able to design and simulate an IC. Two tracks are available: the Digital track, where you can discover the IC design process (synthesis flow and place-and-route) with Synopsys Design Compiler® and Synopsys IC Compiler® tools; and the analog track, where you wil discover the development process of a small analog circuit, using Synopsys Custom Designer tool®.
Associate Professor, Department of Electric Engineering, Pontificia Universidad Católica de Chile.
Assistant Professor, Department of Electronics, Universidad Tecnica Federico Santa Maria, Chile
Full Professor, Institute of Electrical Engineering, Universidad de la República, Uruguay.
Managing Director of Synopsys Chile
Senior Corporate Application Engineer & Project Lead at Synopsys Chile
Quality Engineer at Synopsys Chile
Corporate Application Engineer at Synopsys Chile
School attendants are invited to participate in the technical Poster Session. Poster submission might describe recently completed work, high relevant results of work in progress, or successful system and implementations in areas related to the Circuit design and Systems. Poster submission must be in English, and must include a 2 page abstract plus a draft of the final poster. All submitted material must be in PDF format. Poster format should be A0 (33.1 in x 46.8 in).
If you want to submit a Poster, please inform us that in Registration Form and we will contact you.
This summer school is targeted for students and professionals in the areas of Electronic Engineering, Telocommunications, Biomedics, Computer Science, Math, Physics and so, who want to strengthen their knowledge of Integrated Circuit design.